DMTF Releases PLDM CXL Memory Modeling WIP White Paper

Posted on Thu, 12/14/2023 - 09:00

DMTF recently announced the public availability of its PLDM CXL Memory Modeling White Paper (DSP2067) Work in Progress (WIP). It is available for download here. This document defines example data models for implementing the above-described generic device management of CXL memory devices using PLDM for Platform Monitoring and Control (DSP0248) semantics.

This WIP white paper establishes a common framework that can provide implementation consistency between a system's Management Controller and CXL memory devices connected to the system. It describes two hierarchical modeling schemes for CXL Memory Devices using PLDM for Platform Monitoring and Control DSP0248 semantics:

  • CXL Memory Board (CXL Memory Device with DIMM Expansion)
  • CXL Memory Module (CXL Memory Device with Embedded Memory)

While this document focuses on CXL cards with DIMM expansion slots and CXL modules with embedded memory, these data models are extensible to a variety of implementations.

Designed to be referenced by other standards organizations and developers, DMTF invites public comment on the PLDM CXL Memory Modeling White Paper WIP before finalization. Feedback may be submitted on our website at

For more information about the PMCI Working Group and the platform management standards it defines, please visit